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Voltage Modulation Method for T-type Three-Level Inverter with Reduced Conduction Loss in Low Voltage Modulation Region
Year 2022
Month May
Journal 2022 International Power Electronics Conference (IPEC-Himeji 2022- ECCE Asia)
Author Cheolmin Hwang, Gyu Cheol Lim, Jonghun Choi, Jung-Ik Ha
Link 관련링크 http://ieeexplore.ieee.org/document/9806877 161회 연결
Abstract:
This paper proposes a modulation method to achieve reduced conduction loss for a T-type three-level inverter in a low voltage modulation region. The T-type three-level inverter suffers from a larger conduction loss at the neutral point switching state since two switches exist at the neutral point connection. The proposed method reduces the conduction loss of the inverter by modifying the voltage reference to avoid the region where the conventional reference causes a long conduction period through the neutral point. This modulation method is simple to implement in that it replaces the conventional offset voltage of space vector pulse width modulation with an alternative offset voltage which locates in the middle of the upper or lower carrier. Furthermore, an optimal transition instant between two carriers to achieve the minimum conduction loss is proposed together with theoretical loss analysis. The proposed method is verified by the simulation and experimental results.